1. Field of the Invention
The present invention provides a pixel structure and a fabrication method thereof, and more particularly, to a pixel structure and a fabrication method thereof utilizing a single photomask in two different lithographic processes for defining different patterns.
2. Description of the Prior Art
Due to the continued development in technology, flat displays have been applied to all kinds of information products, especially for thin-film transistor liquid crystal displays (TFT-LCDs) that are the most maturely developed. Because TFT-LCDs have qualities of light weight, low power consumption and no radiated pollution, they have been widely used in various portable information products, such as notebooks, personal digital assistants (PDAs), and etc. Furthermore, the TFT-LCD even has a potential to replace the cathode ray tube (CRT) monitor gradually. Pixel structures arranged as an array are main devices of the TFT-LCD, which comprise electronic devices, such as TFTs, capacitors, pads, and etc., for driving liquid crystal pixels in the production of brilliant images.
A typical fabrication process for a pixel structure of a conventional TFT-LCD has to perform five photolithography processes, which means five photomasks are needed for defining the patterns of the TFT. However, since the cost of photomasks seriously influences the display fabrication costs, a new fabrication process of the pixel structure by using four photomasks, including a half-tone mask or a gray-tone mask, has been researched in order to reduce the fabrication costs.
Referring to FIG. 1 through FIG. 6, FIG. 1 through FIG. 6 are schematic diagrams of a conventional fabrication process for fabricating a pixel array by using four photomasks. As shown in FIG. 1, first, a first conductive layer and a photoresist layer are formed on a transparent substrate 10 in sequence, and then, a first photolithography-etching process (PEP) is performed to form a gate 12 and a wire pattern 14.
Next, as shown in FIG. 2, an insulation layer 16, a semiconductor layer 18, an N+ doped layer 20, a second conductive layer 22 and a photoresist layer 24 are formed on the transparent substrate 10 in sequence. Then, as shown in FIG. 3, a second lithographic process is performed by using a half-tone mask 26. The half-tone region 26a of the half-tone mask 26 is corresponding to a predetermined channel pattern above the gate 12 so as to pattern the photoresist layer 24.
With reference to FIG. 4, next, the patterned photoresist layer 24 is utilized to be an etching mask, and a wet etching and a dry etching are performed for the transparent substrate 10 in sequence to remove a part of the semiconductor layer 18, the N+ doped layer 20 and the second conductive layer 22 so as to form a semiconductor island 32, a source 28 and a drain 30. As shown in FIG. 5, subsequently, a passivation layer 34 is deposited on the transparent substrate 10, and then, a third PEP is performed to form a contact hole 36 in the passivation layer 34 on the drain 30. Finally, as shown in FIG. 6, a transparent conductive layer is formed on the transparent substrate 10, and a fourth PEP is performed to remove a part of the transparent conductive layer on the semiconductor island 32 so as to form a pixel electrode 38. The pixel electrode 38 is electrically connected to the drain 30 through the contact hole 36.
As mentioned above, the conventional fabrication process of TFTs uses the half-tone mask during the second PEP process by taking its half-tone region to define the channel pattern of the TFT. Because the size of the channel pattern of the TFT is very detailed and minute, the half-tone mask for defining the channel pattern by its half-tone region has to be very accurate, whose costs is very high that is twice the cost of normal photomask. In addition, once a defect of the transference of the channel pattern occurs during the second PEP by using a half-tone mask, it will seriously affect the electric property of the TFT, which is hard to be repaired, so as to affect the electrical performance of the TFT.
Therefore, how to fabricate TFTs with lower-cost and practicable processes is still an important issue for the manufactures.